Heritage / 1 is (or intends to be) a computer "classic", and as such uses a "cumulative" (record) that works with a typical Arithmetic Logic Unit (ALU). The latter consists of 16 purely combinational circuits whose outputs feed an internal bus called Bus Result (R-BUS).
Each of these combinational circuits has two 16-bit inputs and one output also 16 bits. Tickets are continuously fed from the internal CPU Data Bus (D-BUS) and the output of the accumulator, respectively. The output connects to the R-BUS via a third buffer state, in particular, the first of these circuits do not pass over the D-BUS to combine their output without the contents of the accu, which allows to use A as a regular registration.
logical and arithmetic instructions generate control signals for the circuit for the ALU (for example, the Addendum) opened its R-BUS output while the others remain in third state, after which it commands the tank to store the result (R-BUS).
The following block diagram of the CPU, you can see which is the interconnection between the accumulator (A) and the ALU.
Frankly, this arrangement was the first thing that came to mind, after designed, however, I have seen is not as common nor commercial computers or on personal projects like Heritage / 1. Usually (as I have seen) is to place the accumulator "before" the ALU, allowing the result of the arithmetic logical operation calculated by the same go directly to the data bus.
The following block diagram of the Intel 8085 microprocessor can be seen that type of arrangement.
The advantage is obvious: the result of a logical, arithmetic can be any record of the CPU (not just in A) which avoids having to move a step further. However, there is a price to pay: the need for a temporary register feeding the other input ALU, as shown in the figure above.
Designing Heritage / 1 has among its premises a minimum use of temporary registers and do not use either. This is in the mood to save clock cycles in the execution of the instructions, so as to simplify the circuits in question. So use a temporary register for the ALU would mean a breach of this premise.
The price to pay is the inability to save the result of an arithmetic logical operation in another record that is not A, as illustrated in the following code segment:
; Add contents of B and D
; depositing the result in C
mov a, b
add a, d
mov c, a
, with a different architecture, had taken
, a single instruction:
, add b, d, e
recognize it is a limitation imposed on the programmer - I'll be myself after all! - but assume for the sake of preserving a simple hardware design where the use of temporary registers is a kind of heresy.
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